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Power Supply IC

Built-in Latch-up Release Function with Automatic Recovery Sequence LDO (Low Drop Out) with Latch-up Release Function MM1897

2016.03.11

Overview

The <MM1897> features a built-in latch-up release function (patent pending) with (1) Latch-up detection ⇒ (2) Power source shut-off ⇒ (3) Latch-up release ⇒ (4) Automatic recovery sequence, which helps to prevent damage to micro-computers caused by latch-up.
The use of bi-polar processing and a noise suppression element result in a design that makes it difficult for the IC itself to cause damage due to latch-up or static electricity.
Results of static electricity noise/electric field noise/magnetic field noise tests that comply with IEC61000-4-2 (Electrostatic Discharge Immunity Tests) have show a much better ability to withstand noise than Mitsumi's previous products.

Features

  1. Latch-up Release Function (current detection threshold, detection delay time and recovery delay time can be set)
  2. Resilient against noise (IEC61000 Contact Discharge Test immunity 25kV)
  3. Wide operating voltage range (maximum operating voltage 14V)

Main specifications

Power supply voltage VOUT (Typ.) +0.5 to 14V
(absolute maximum rating : -0.3V to 15V)
Operating temperature range -30~+85℃
Consumption current 3mA typ.
Consumption current when OFF 10µA max.
Output voltage A rank 5.0V typ. ±2%
B rank 3.3V typ. ±2%
Input/output voltage difference 0.1V typ. (VCC-0.2V, IOUT=50mA)
Abnormal current detection current *1 100mA typ. (RLATCH=2kΩ)
Abnormal current detection delay time *2 1.0ms typ. (CD=0.1µF)
Output recovery time *3 10ms typ. (CR=0.1µF)
Package DIP-8, DIP-16, SOP-16
*1 Can be set with external resistance RLATCH
*2 Can be set with external capacity CD
*3 Can be set with external capacity CR
* Specifications may change due to modifications or improvements

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